What you will learn:

How to leverage the flexibility of a mixed signal oscilloscope equipped with FlexChannels® to debug and verify systems with a wide variety of parallel and serial bus configurations.


Introduction

Most embedded systems, even relatively simple ones, incorporate multiple bus structures. Being able to observe these systems requires debug and verification tools capable of displaying the activity of multiple buses, as well as sensor, actuator, display, and interface signals. Not only are you challenged with looking at multiple buses, but each bus may require a different approach to signalling, and therefore probing. Some can be observed using single-ended measurements, while others require differential measurements.

In order to look at multiple buses, you may be able to take advantage of digital logic channels to greatly expand your channel count. This blog post discusses the challenges embedded system designers face in evaluating multi-bus systems, and how to overcome them especially using FlexChannel input channels.

New FlexChannel input channels help to address the need to measure many different signals by enabling the use of the widest range of probes. Each FlexChannel can measure:

  • 1 single-ended analog signal with a passive probe
  • 8 digital logic signals with a TLP058 logic probe to access 8 digital channels.
  • 1 differential voltage with a TekVPI® differential voltage probe
  • 1 optically-isolated differential voltage with the IsoVu™ Isolated Measurement System
  • 1 current with a TekVPI® current probe

8-FlexChannel MSO58 with analog and digital probes connected

8-FlexChannel MSO58 with analog and digital probes connected

TLP058 logic probe for 5 Series MSO may be attached to any FlexChannel to provide access to 8 digital signals

The 5 Series MSO is the ultimate tool for debugging and verifying multi-bus systems. It starts with the large, 15.6-inch high-definition display, which offers twice the display area of a 10.4-inch display and the high-definition resolution to support many signals and buses.

The 5 Series MSO includes 4-, 6-, and 8-FlexChannel® models enabling them to acquire twice as many analog signals as most oscilloscopes. Each FlexChannel also provides 8 digital inputs which are accessed simply by connecting a TLP058 logic probe.

In addition to being able to change back and forth from analog to digital signal acquisition, the FlexChannel’s distinctive architecture allows for the very tight integration of analog and digital acquisition. Analog and digital signals use the same trigger circuitry and are sampled at the same time at the same rate, removing analog/digital timing uncertainty from the measurement process.


Considerations for High-Fidelity Bus Signal Capture


Acquiring single-ended bus signals

Many common low- and mid-speed buses use single-ended signalling, representing digital signals with specific voltages relative to system ground. These analog signals are typically captured using the standard passive voltage probes included with an oscilloscope or with a digital probe on a mixed signal oscilloscope. FlexChannel inputs support both of these probe types. Here are some important considerations:

  • Keep ground leads as short as possible. Successful acquisition of the analog signal begins with assuring that the reference voltages of each of the channels are connected to the oscilloscope through a low-inductance path.
  • Assure that the rise-time of the measurement system is less than one-fifth of the signal rise-time. The performance of the oscilloscope and probe must be adequate to faithfully represent the signal. A common guideline is to assure that the bandwidth of the measurement system is at least five times the bandwidth of the signal and that the sample rate is at least 3-5 times the signal bandwidth.
  • For digital logic on MSOs, the system bandwidth of the oscilloscope and probe combination should be adequate to capture the signal, and the sample rate on the digital channel should be at least ten times the frequency of the signal. Performance is often specified in terms of bandwidth or, inversely, minimum detectable pulse width.
  • Minimize probe loading effects on the signal by assuring the probe impedance is large compared to the signal’s source impedance. For low-power circuits, this may be dominated by the probe’s input resistance, while, for high-speed signals, this is dominated by probe input capacitance.

Acquiring differential bus signals

To improve the noise immunity of bus signals and to improve the signal integrity of high-speed buses, differential signalling is often used. Unlike single-ended signalling, differential signals are represented by the voltage difference between two signals. For some low-frequency applications, each side of the differential signal can be captured with a single-ended probe and the oscilloscope can calculate the mathematical difference. In practice, this technique is very susceptible to errors due to differences in probe gain, propagation delay, and compensation.

The most reliable way to capture a differential signal is to use an active differential probe, which uses a differential amplifier at the probe tip to sense the voltage difference.

The performance considerations for single-ended probes, outlined above, still apply to digital probes. However, the ability of differential probes to ignore or reject common-mode signals must also be considered. The key specification for these probes is the Common Mode Rejection Ratio (CMRR) at the frequency of interest. Tektronix provides a range of differential probes at different performance level, including the optically-isolated IsoVu™ differential measurement systems for the most demanding measurement environments.


Troubleshooting Multiple-Bus Systems using FlexChannel® Input Channels

For all forms of signalling - Thresholds are key

No matter which technique is used to capture the signal, an analog representation of the bus signal is typically connected to the oscilloscope. Before the bus signal can be properly interpreted, the analog signal must be compared with a threshold value, above which the signal is typically interpreted as a high (“1”) and below which the signal is interpreted as a low (“0”). (In some cases, the analog voltages are compared to threshold values inside the digital logic probes.)

Many embedded designs are based on multiple logic families, requiring the use of a variety of digital thresholds. Oscilloscopes that allow per-channel thresholds enable maximum debug flexibility and acquisition fidelity.


Using waveform trigger modes to isolate signal integrity issues

Using waveform trigger modes to isolate signal integrity issues

When debugging signal integrity issues with parallel or serial buses, start with the standard trigger modes in an advanced oscilloscope to capture signals that violate the design specifications:

  • Pulse Width triggering can be used to isolate glitches and minimum pulse width violations on clock and data lines.
  • Timeout triggering can be used to isolate missing pulses, such as in a clock signal.
  • Rise-time and Fall-time triggers can be used to isolate signal edges that are too fast or too slow for the design.
  • Runt and Window triggering can be used to isolate digital signals that have improper amplitudes, either too low or too high.
  • Multi-channel Setup & Hold triggering compares the timing of one or more data signals to the clock signals to detect violations of the component setup and hold times.

This example of standard digital debug triggering shows the bus setup and hold trigger configuration menu and display. Analog channels (channels 1, 2, and 5-8) and 16 digital inputs (channels 3 and 4) are available, and the oscilloscope is set to trigger on a timing violation.


Automated Bus Analysis

Automated Bus Analysis

Once any signal integrity issues have been addressed, the next step is to verify that the broader system is working as expected.


Decoding bus signals

With parallel bus architectures, each component of the bus has its own signal path. There may be address lines, data lines, a clock line, and various control signals. Address or data values sent over the bus are transferred at the same time over all the parallel lines. This makes it relatively easy to isolate an event of interest using the logic triggering found in most oscilloscopes. To decode the activity on a parallel bus, the logic state of each of the address, data, and control lines must be sampled at the appropriate time, usually coincident with the clock signal. The screen above shows a parallel bus setup configuration menu and display, showing that analog (channels 1 and 2) and 16 digital inputs (channels 3 and 4) are available, and triggering on a specific bus value.

On a serial bus, all this information is sent sequentially on one or a few conductors. This means that a single signal may include address, data, control, and clock information. As an example, consider the Inter-IC (I2C) serial bus, where the clock is transmitted on one conductor and the data signal is transmitted on a second.

Armed with knowledge of the I2C protocol, bus traffic can be manually decoded by capturing the signals, finding the start of the message (data going low while the clock is high), manually inspecting and writing down the data value on every rising edge of the clock, and then organizing the bits into the message structure. But this is a very time-consuming and error-prone process – not an efficient way to get a high-quality product to market.

I2C serial bus setup for automated decoding and triggering

There is a better way. The example above shows an I2C serial bus setup for automated decoding and triggering. It shows the configuration menu, decode display incorporating analog input signals, and digital waveforms. The decoded bus traffic triggered on a bus write to address 50 hex.

These sorts of optional bus analysis tools are available for some of the most common low and mid-speed serial standards used in embedded system design. Support for parallel and serial bus standards vary depending on the oscilloscope model. Appendix A shows the bus support available on the 5 Series MSO. For a table comparing bus support on different Tektronix oscilloscopes, please see Appendix B.

Notice the digital waveforms displayed below the decoded bus which show the results of comparing the analog input signals to the threshold values - an intermediate step to decoding the serial bus. By visually comparing the analog and digital waveforms, this display can be used to verify that the threshold values are correctly set.

By visualizing key signals in the design before and after the trigger point, you can understand the causes and effects to debug problems and verify the system is operating as designed. For example, you can quickly find out that a system error occurs shortly after each bus write to a specific device.

DECODING BUS SIGNALS

The time-correlated waveform and bus decode display is a familiar and useful format for many hardware engineers. For firmware engineers, however, the Results Table format may be more useful. This time-stamped display of bus activity can be easily compared to the software listings, and provides easy calculation of the execution speed.


AUTOMATED SEARCHING FOR SPECIFIC BUS EVENTS

Automated searching for specific bus events

When the bus trigger is correctly set up, the oscilloscope will capture all of the input signals and one specified bus event will be positioned at the trigger point. But how many of the events occurred? You can manually scroll through the acquired data to find the events. But that is timeconsuming and error-prone.

A more efficient and reliable method is to use the automated Wave Inspector® search. The setup is similar to the bus trigger setup, enabling the oscilloscope to automatically find and mark all of the occurrences of the bus events of interest. In this example, the search is set up to look for Data value 16 hex on the I2C bus. Data byte 16 hex occurs 11 times in the acquired bus data, and each occurrence is indicated by a pink triangle at the top of the display. A detailed view of one of the matching serial data packets is shown with the pink bracket icon in the zoom window at the bottom of the display.


Multi-Bus Debug and Verification

Multi-Bus Debug and Verification

Mixed signal oscilloscopes, outfitted with automatic bus decoding and triggering, are well-suited for debugging multi-bus systems. Once you are confident in the performance of one or more buses, plentiful digital channels may be used to provide insight into bus activity or to provide triggers. This allows you to reserve precious analog channels for gaining deeper visibility into signal quality.

This shows a multi-bus display on an 8-channel 5 Series MSO. It shows 3 buses in a synchronized view:

  • I2C serial bus based on analog channels 1 and 2, using two single-ended passive probes
  • SPI serial bus based on digital inputs on channel 3, using a TLP058 logic probe
  • Parallel bus based on channel 4 digital inputs, using a TLP058 logic probe

By combining digital and analog channels the 5 Series MSO can support a number of buses, limited only by the combined number of channels.


Appendix A

Bus triggering, searching, and decoding available on the 5 Series MSO:

TRIGGER / SEARCH ON:

BUS DECODE DISPLAYS:

Parallel (standard) Data value (binary / hex) Data value

I2C
(option 5-SREMBD)

Start, Repeated Start, Stop, Missing Ack, Address (7 or 10 bit),
Data (1-5 bytes), Address and Data

Start, Address, Data, Missing Ack, Stop

SPI
(option 5-SREMBD)

SS Active (3-wire SPI), Start of Frame (2-wire SPI),
Data (1-16 bytes)

Start, Data, Stop

RS-232 / RS-422 /
RS-485 / UART
(option 5-SRCOMP)

Start, End of Packet, Data (1 - 10 bytes), Parity Error Start, Data, Parity, Parity Error

CAN
(option 5-SRAUTO

Start of Frame, Type of Frame (Data, Remote, Error, Overload),
Identifier (Standard or Extended), Data (1-8 bytes), Identifier and
Data, EOF, Missing Ack, Bit Stuff Error

Start of Frame, Identifier, Data Length Control, Data, CRC,
End of Frame, Errors

LIN
(option 5-SRAUTO)

Sync, Identifier, Data (1-8 bytes), ID and Data, Wakeup Frame, Sleep
Frame, Error (Sync, ID Parity, Checksum)

Start of Frame, Sync, Identifier, Data, CRC, Errors

FlexRay
(option 5-SRAUTO)

Start of Frame, Indicator Bits (Normal, Payload, Null, Sync, Startup),
Cycle Count, Header Fields (Indicator Bits, Identifier, Payload Length,
Header CRC, and Cycle Count), Identifier, Data, Identifier and Data,
End Of Frame (Static, Dynamic), Error (Header CRC, Trailer CRC,
NULL Frame in Static, NULL Frame in Dynamic, Sync Frame in
Dynamic, Start Frame No Sync)

TTS, Start, Frame ID, Payload Length, Headers, Cycle Count, Data,
CRC, DTS, CID, Stop

USB 2.0
(option 5-SRUSB2)

Token packet, Data packet, Handshake packet, Special packet, Error Start, PID, Data, CRC, Stop

10/100BASE-T Ethernet
(option 5-SRENET)

Start Frame Delimiter, Source and Destination MAC Addresses,
MAC Q-tag Control Information, MAC Length/Type, MAC Client
Data (1-16 bytes), IPV4 Header, TCP Header, TCP/IPv4 Client Data
(1-16 bytes), End of Packet, FCS (CRC) Error, Idle

Start of Frame, Preamble, Start of Frame, MAC Destination and
Source Addresses, MAC Length/Type, Data, IPv4 Header, TCP
Header, Frame Check Sequence/CRC, End of Packet, Error

I2S / LJ / RJ / TDM
(option 5-SRAUDIO)

Word Select (I2S, LJ, RJ only), Frame Sync (TDM only), Data

Left Channel Data (I2S, LJ, RJ), Right Channel Data (I2S, LJ, RJ),
Channel 1 – N Data (TDM)


Appendix B

Tektronix offers a range of models to meet your performance needs:

MSO/DPO70000 SERIES

DPO7000C SERIES

5 SERIES MSO

MSO/DPO5000 SERIES

MDO4000C SERIES

MDO3000 SERIES

MSO/DPO2000 SERIES

Bandwidth

33 GHz, 25 GHz, 23 GHz, 20 GHz, 16 GHz, 12.5 GHz, 8 GHz, 6 GHz, 4 GHz

3.5 GHz, 2.5 GHz, 1 GHz, 500 MHz 2 GHz, 1 GHz, 500 MHz, 350 MHz 2 GHz, 1 GHz, 500 MHz, 350 MHz 1 GHz, 500 MHz, 350 MHz, 200 MHz 1 GHz, 500 MHz, 350 MHz, 200 MHz, 100 MHz 200 MHz, 100 MHz, 70 MHz

Analog Channels

4

4 4, 6, 8 4 4 2 or 4 2 or 4

Digital Channels

16 (MSO)

--- 8 to 64 (opt.) 16 (MSO) 16 (opt.) 16 (opt.) 16 (MSO)

Spectrum Analyzer
Channels

 

--- --- --- --- 1 (opt.) 1 ---

Record Length
(All Channels)

 

Up to 62.5 M (std.)
Up to 250 M (opt.)

25 M (std.)
Up to 125 M (opt.)

62.5 M (std.)
125 M (opt.)

25 M (std.)
Up to 125 M (opt.)

20 M 10 M 1 M

Sample Rate
(Analog)

Up to 100 GS/s

Up to 40 GS/s Up to 6.25 GS/s Up to 10 GS/s Up to 5 GS/s Up to 5 GS/s 1 GS/s

Color Display

12.1 in. XGA

12.1 in. XGA

15.6 in. HD

10.4 in. XGA 10.4 in. XGA 9 in. WVGA 7 in. WQVGA

Parallel Bus Triggering and Analysis

Standard Standard Standard Standard Optional Optional

Standard in MSO models

Serial Bus Triggering and Analysis Applications

 

I2C
SPI
RS-232/422/485/
UART
CAN
LIN
FlexRay
USB 2.0
10/100BASE-T
Ethernet
MIL-STD-1553
8b/10b decoding
D-PHY MIPI
decoding
PCI Express
decoding

I2C
SPI
RS-232/422/485/
UART
CAN
LIN
FlexRay
USB 2.0
10/100BASE-T
Ethernet
MIL-STD-1553
8b/10b decoding
D-PHY MIPI
decoding
PCI Express
decoding

I2C
SPI
RS-232/422/485/
UART
CAN
LIN
FlexRay
USB 2.0
10/100BASE-T
Ethernet
I2S/LJ/RJ/TDM

I2C
SPI
RS-232/422/485/
UART
CAN
LIN
FlexRay
USB 2.0
10/100BASE-T
Ethernet
MIL-STD-1553
8b/10b decoding
D-PHY MIPI
decoding
PCI Express
decoding

I2C
SPI
RS-232/422/485/
UART
CAN
CAN FD
LIN
FlexRay
USB 2.0
I2S/LJ/RJ/TDM
MIL-STD-1553

I2C
SPI
RS-232/422/485/
UART
CAN
CAN FD
LIN
FlexRay
USB 2.0
I2S/LJ/RJ/TDM
MIL-STD-1553

I2C
SPI
RS-232/422/485/
UART
CAN
LIN

Number of Simultaneously Displayed Serial Buses

16

16

Essentially unlimited

16 3 2 2

Input Impedance of the Standard Passive Probes

---

10 MΩ / 9.5 pF

10 MΩ / 3.9 pF 10 MΩ / 3.9 pF 10 MΩ / 3.9 pF 10 MΩ / 3.9 pF 10 MΩ / < 12 pF

Input Impedance of the Digital Probes

3.0 pF / 20 kΩ
(P6716A)
0.5 – 2.0 pF / 20
kΩ(P6780)

--- < 3 pF / 100 kΩ < 3 pF / 100 kΩ < 3 pF / 100 kΩ 8 pF / 101 kΩ 8 pF / 101 kΩ

Digital Probe Toggle Frequency or Bandwidth

1 GHz (P6716A)
2.5 GHz (P6780)

--- 500 MHz 500 MHz 500 MHz 5 ns 5 ns

Tektronix 5 Series MSO - Mixed Signal Oscilloscope

The largest display. The most channels. The greatest experience.

The 5 Series MSO is ready for today’s toughest challenges, and tomorrow’s too. It sets a new standard for performance, analysis, and overall user experience.



Tektronix 5 Series MSO Oscilloscope


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